Responsibilities
· Work closely with the architects to contribute to the design of the Crypto-Manager Root-of-Trust product.
· Cooperate with the Software Team, Product Managers, Security experts and other stakeholders to support the current and next generation security products.
· Drive design improvements for continuous product quality and safety.
· Assure the delivered product and documentation adheres to Rambus quality and safety standards.
· Support to optimize and automate the design flow.
Qualifications
Experience/Skills
BS/MS degree in electrical or computer engineering required.
Work experience in digital design either as hardware engineer or test engineer.
Demonstrated proficiency in Verilog/(or VHDL) and digital design.
Expertise in some or all of the following areas is beneficial:
Secure hardware design
Cryptographic algorithms and side-channel attacks
High performance CPU architecture and design.
Modern SoC design methodologies and architectures.
Low-power design techniques.
Clock and reset domain crossing techniques.
DFT, especially memory testing and characterization and/or Logic BIST methodologies. Hardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts.
Ability to work with technical writers in the creation of technical documentation.
Working with IP products
Development of design flow and automation scripts for IP products
Tools/Technologies
Verilog (or VHDL), SystemVerilog, Perl
Shell scripting, Python, Sage, Tcl
Xilinx Vivado,
Unix, Linux
Front-end ASIC design tools, such as
Synopsys Design Compiler
Cadence Genus
Synopsys Spyglass
Cadence Conformal(-LP)
ASIC simulation/verification tools, such as
Cadence Xcelium
Synopsys Verdi
Mentor Questa Formal Verification
3 - 6 years of experience
About Rambus
With 30 years of innovation and semiconductor expertise, Rambus leads the industry with products and solutions speed performance, expand capacity and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.