Responsibilities
Lead the design and implementation of verification methodologies, test plans, testbenches, infrastructure, and platforms to produce thoroughly verified and robust products
Partner closely with our architecture and design teams in specification and customer requirement reviews
Represent verification methodologies in front of key customers and executive management
Architect and help implement best verification practices, IP development and productization, quality assurance, release automation and improvements on the existing methodologies and flows
Tackle sophisticated problems and develop scalable solutions that work across platforms
Assist with all hardware project phases – bring-up, testing, debug, coverage analysis, and tracking
Help with IP integration in partner environments and provide debug assistance to customer support teams
Qualifications
BS or MS degree in electrical or computer engineering or closely related degree strongly preferred; but substantial, relevant, outstanding work experience may substitute in some cases
Ten or more years of experience working as a verification engineer or related field
Strong written and verbal communication skills: ability to explain complex concepts in front of technical audience
Strong desire to take ownership of all verification aspects of a project, including team and methodology leadership
Exposure to block-level and/or system-level verification
Highly technical competence that includes a track record of effective verification of complex digital designs
Solid understanding of standard ASIC verification techniques, including:
Test planning
Testbench creation
Code and functional coverage
Directed and SystemVerilog-based constrained random stimulus generation
Self-checking – scoreboards, predictors, or reference models
Assertions
Solid understanding of verification methodologies (UVM or OVM) and standard testbench languages
Comfortable with Unix development environments (make, scripting, SVN, etc.), and with industry-standard EDA tools (VCS, Xcelium)
Ability to support testbench lint/rule checking, profiling and automation using perl or python scripting
Familiarity with advanced verification techniques such as object-oriented testbenches, fault/stimulus injection, FPGA prototyping and/or formal verification
Beneficial Experience:
Experience leading multi-site teams and projects, including task and schedule estimation
Experience in a customer-facing role
Experience developing object-oriented testbench infrastructure in C/C++, OVM, or UVM
Experience in creating FPGA bitfiles for FPGA emulation/acceleration purposes
Familiarity with IP integration, IP core delivery, and handoff issues
Data, software, and/or network security; cryptography
Ability to work with technical writers in the production of technical documentation
Personal Attributes:
Excellent written, verbal, and interpersonal communication skills
Able to communicate ideas in both technical and user-friendly language
Able and willing to work in a team-oriented, collaborative environment
Able to coordinate with internal and external teams across time zones
A demonstrated ability to prioritize and execute tasks so as to achieve goals in an innovative, fast-paced, and often high-pressure environment
Proven analytical and creative problem-solving abilities
Passion for writing clean and neat code that adheres to coding standards
About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and
processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.